DocumentCode :
3133833
Title :
An empirical breakdown model of the gate oxide under current stress
Author :
Seo, Jin-Ho ; Woo, Jason C S
Author_Institution :
Linear Technol. Corp., Milpitas, CA, USA
fYear :
1999
fDate :
1999
Firstpage :
136
Lastpage :
139
Abstract :
Intensive studies of gate oxide reliability have been made because of its impact on device performance and reliability. It is believed that oxide damage, such as interface states and broken bonds induced under high field and current injection stress, is in the form of generated traps (Apte and Saraswat, 1994; Schuegraf and Hu, 1994). However, the mechanisms of electron trapping are not clearly understood because of their sensitivity to the process and stress conditions (Huang et al, 1989; Dimaria et al., 1985; Lin et al., 1985; Eriguchi and Niwa, 1997; Rodriguez et al., 1998; Watt and Plummer 1987). TDDB using constant stress voltage or current is a well-known technique to characterize the gate oxide reliability. Under a constant voltage stress, it is difficult to determine the relationship between the amount of trapped charges and the stress current or electric field because the electric field and current varies with the amount of trapped charge during the stress. In this study, constant current stress was used to maintain a constant electric field during the stress and to monitor directly the amount of trapped charges with the gate voltage shift. The roles of the gate barrier height, SiO2 gate oxide thickness, and temperature in the breakdown characteristics of gate oxides are discussed. Also, the maximum operating voltage and gate oxide lifetime are estimated using a new oxide breakdown model
Keywords :
MOS capacitors; MOSFET; dielectric thin films; electric current; electron traps; interface states; semiconductor device breakdown; semiconductor device models; semiconductor device testing; MOS capacitors; MOSFET; SiO2 gate oxide thickness; SiO2-Si; TDDB; breakdown characteristics; broken bonds; constant current stress; constant electric field; constant stress current; constant stress voltage; current injection stress; current stress; device performance; device reliability; electron trapping mechanisms; empirical breakdown model; gate barrier height; gate oxide; gate oxide lifetime; gate oxide reliability; gate oxides; gate temperature; gate voltage shift; generated traps; high field stress; interface states; maximum operating voltage; oxide breakdown model; process conditions; stress conditions; stress current; trapped charges; Boron; Breakdown voltage; Capacitors; Electric breakdown; Electron traps; Monitoring; Rapid thermal annealing; Stress; Temperature measurement; Tunneling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits, 1999. Proceedings of the 1999 7th International Symposium on the
Print_ISBN :
0-7803-5187-8
Type :
conf
DOI :
10.1109/IPFA.1999.791322
Filename :
791322
Link To Document :
بازگشت