• DocumentCode
    3133843
  • Title

    IA^3: An Interference Aware Allocation Algorithm for Multicore Hard Real-Time Systems

  • Author

    Paolieri, Marco ; Quiñones, Eduardo ; Cazorla, Francisco J. ; Davis, Robert I. ; Valero, Mateo

  • Author_Institution
    Barcelona Supercomput. Center (BSC), Barcelona, Spain
  • fYear
    2011
  • fDate
    11-14 April 2011
  • Firstpage
    280
  • Lastpage
    290
  • Abstract
    In multicore processors, the execution environment is defined as the environment in which tasks run and it is determined by the hardware resources they get and the workload with which they are executed. Thus, different execution environments lead to different inter-task interferences accessing shared hardware resources due to conflicts with the other corunning tasks, making the WCET estimation of a task dependent on the execution environment in which it runs. Despite such dependency, current partitioned scheduling approaches use a single WCET estimation per task: typically the highest for all execution environments in which a task runs. In this paper we introduce IA3: an interference-aware allocation algorithm that considers not a single WCET estimation but a set of WCET estimations per task. IA3 is based on two novel concepts: the WCET-matrix and the WCET-sensitivity. The former associates every WCET estimation with its corresponding execution environment. The latter measures the impact of changing the execution environment on the WCET estimation. This allows IA3 to reduce the number of resources required to schedule a given taskset. In particular, our results show that in a four-core processor considering tasksets with a total utilization of 2.9, IA3 is able to schedule 70% of the tasksets using 3-cores while a classical partitioned approach with a First-Fit Decreasing heuristic is able to schedule only 5% of the tasksets using 3-cores.
  • Keywords
    multiprocessing systems; processor scheduling; real-time systems; IA3; WCET estimation; WCET-matrix; WCET-sensitivity; inter-task interferences; interference aware allocation algorithm; multicore hard real-time systems; multicore processors; partitioned scheduling; Estimation; Hardware; Multicore processing; Program processors; Resource management; Schedules; Sensitivity;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Real-Time and Embedded Technology and Applications Symposium (RTAS), 2011 17th IEEE
  • Conference_Location
    Chicago, IL
  • ISSN
    1080-1812
  • Print_ISBN
    978-1-61284-326-1
  • Type

    conf

  • DOI
    10.1109/RTAS.2011.34
  • Filename
    5767118