DocumentCode :
3133900
Title :
A latch-up immunized lateral trench-gate conductivity modulated power transistor
Author :
Cai, Jun ; Lo, Keng Foo ; Sin, Johnny K O
Author_Institution :
Chartered Semicond. Manuf. Ltd., Singapore
fYear :
1999
fDate :
1999
Firstpage :
168
Lastpage :
172
Abstract :
In this paper, a latch-up immunized lateral trench-gate bipolar transistor (LTGBT) is presented, along with its numerical simulations and experimental results. The current at which latch-up occurs in the structure is estimated in comparison with that of the lateral IGBT (LIGBT). The static and dynamic latch-up current densities of the LTGBT were 700 A/cm2 and 640 A/cm2, respectively. These results indicate an improvement of 2.3 times and 4.2 times over those for the LIGBT at the same n+ cathode length of 5 μm. The dependence of the latch-up current density on the design of the n+ and p+ cathode regions of the structure is also examined. The maximum controllable current density is found to increase with decreasing space between the trench gate and the p+ cathode. Specifically, as the space decreases to 2 μm, no latch-up phenomenon was observed in our experiment. This remarkable improvement in the latch-up performance is accomplished at the expense of an increase of 0.8 V in the threshold voltage
Keywords :
cathodes; current density; isolation technology; numerical analysis; power bipolar transistors; semiconductor device measurement; semiconductor device models; LTGBT; cathode length; cathode regions; dynamic latch-up current density; latch-up current; latch-up current density; latch-up immunized lateral trench-gate bipolar transistor; latch-up immunized lateral trench-gate conductivity modulated power transistor; latch-up performance; latch-up phenomenon; lateral IGBT; maximum controllable current density; numerical simulation; p+ cathode; static latch-up current density; threshold voltage; trench gate; Anodes; Bipolar transistors; Cathodes; Conductivity; Current density; Insulated gate bipolar transistors; Numerical simulation; Power transistors; Semiconductor device manufacture; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits, 1999. Proceedings of the 1999 7th International Symposium on the
Print_ISBN :
0-7803-5187-8
Type :
conf
DOI :
10.1109/IPFA.1999.791328
Filename :
791328
Link To Document :
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