DocumentCode
3134311
Title
The Horizon supercomputing system: architecture and software
Author
Kuehn, James T. ; Smith, Burton J.
Author_Institution
Supercomput. Res. Center, Lanham, MD, USA
fYear
1988
fDate
14-18 Nov 1988
Firstpage
28
Lastpage
34
Abstract
An overview is given of Horizon, a shared-memory multiple-instruction-stream-multiple-data-stream computer architecture currently under study. Its performance target is a sustained rate of 100 GFLOPS (billions of floating-point operators per second), using a few hundred identical scalar processors. The Horizon architecture is described and its performance is estimated. The processor instruction set and a simple programming example are given
Keywords
parallel architectures; parallel machines; parallel programming; Horizon supercomputing system; performance; processor instruction set; scalar processors; shared-memory MIMD computer architecture; shared-memory multiple-instruction-stream-multiple-data-stream computer architecture; software; Computational modeling; Computer aided instruction; Computer architecture; Delay; Interference; Multiprocessor interconnection networks; Parallel processing; Performance analysis; Software systems; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Supercomputing '88. [Vol.1]., Proceedings.
Conference_Location
Orlando, FL
Print_ISBN
0-8186-0882-X
Type
conf
DOI
10.1109/SUPERC.1988.44631
Filename
44631
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