DocumentCode :
3134724
Title :
Design and implementation of wireless sensor node based on open core
Author :
Wei, Jiesheng ; Wang, Ling ; Wu, Feng ; Chen, Yibo ; Ju, Long
Author_Institution :
Dept. of Comput. Sci. & Technol., Harbin Inst. of Technol., Harbin, China
fYear :
2009
fDate :
20-21 Sept. 2009
Firstpage :
102
Lastpage :
105
Abstract :
Wireless sensor nodes are essential elements in wireless sensor networks. There are two important issues which need to be considered in order to build a sensor node: low power consumption and scalability. This paper proposes and presents a SoC architecture of wireless sensor node based on open source IP blocks such as OpenRISC 1200 microprocessor core and Wishbone Interconnect Matrix bus core. This hardware architecture is then verified in Altera Quartus II, and the power consumption and scalability of the hardware platform are assessed. At last, the whole system of the wireless sensor node is integrated on Altera DE2-70 FPGA board and its sensing, computation and wireless communication capabilities are verified.
Keywords :
field programmable gate arrays; microprocessor chips; reduced instruction set computing; system-on-chip; wireless sensor networks; Altera Quartus II; OpenRISC 1200 microprocessor core; Wishbone interconnect matrix bus core; field programmable gate arrays; open source IP blocks; wireless sensor networks; wireless sensor nodes; Computer architecture; Energy consumption; Field programmable gate arrays; Hardware; Microprocessors; Power system interconnection; Scalability; Sensor systems; Wireless communication; Wireless sensor networks; OpenRISC 1200; Wireless Sensor Node; hardware architecture;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Information, Computing and Telecommunication, 2009. YC-ICT '09. IEEE Youth Conference on
Conference_Location :
Beijing
Print_ISBN :
978-1-4244-5074-9
Electronic_ISBN :
978-1-4244-5076-3
Type :
conf
DOI :
10.1109/YCICT.2009.5382416
Filename :
5382416
Link To Document :
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