Author :
Zhao, B. ; Feiler, D. ; Ramanathan, V. ; Liu, Q.Z. ; Brongo, M. ; Wu, J. ; Zhang, H. ; Kuei, J.C. ; Young, D. ; Brown, J. ; Vo, C. ; Xia, W. ; Chu, C. ; Zhou, J. ; Nguyen, C. ; Tsau, L. ; Dornish, D. ; Camilletti, L. ; Ding, P. ; Lai, G. ; Chin, B. ; John
Author_Institution :
Semicond. Syst., Rockwell Int. Corp., Newport Beach, CA, USA
Abstract :
Copper and a low dielectric constant (low-/spl kappa/) material have been successfully integrated in a dual damascene interconnect architecture. The low-/spl kappa/ material (/spl kappa/=2.2) was used as intra-level dielectric and inter-level dielectric, which has led to significant reduction in both intra-level and inter-level capacitance. In addition, low Cu wiring resistance and low Cu via resistance have been achieved in the dual damascene interconnect which offers process simplification and low cost.
Keywords :
copper; dielectric thin films; integrated circuit interconnections; permittivity; Cu; Cu/low-/spl kappa/ dual damascene interconnect; capacitance; dielectric constant; integrated circuit; inter-level dielectric; intra-level dielectric; via resistance; wiring resistance; Artificial intelligence; Capacitance; Copper; Costs; Dielectric materials; Electrical resistance measurement; Etching; Insulation; Integrated circuit interconnections; Wiring;
