DocumentCode
3135814
Title
Compiling multimedia applications on VLIW architecture
Author
Sakellariou, Rizos ; Stöhr, Elena A. ; Boyle, Michael F P O´
Author_Institution
Dept. of Comput. Sci., Manchester Univ., UK
Volume
2
fYear
1997
fDate
2-4 Jul 1997
Firstpage
1007
Abstract
This paper describes a new compiler-directed approach to obtaining high-performance for multimedia applications. By integrating high-level program restructuring and low-level scheduling, an iterative approach to optimizing for embedded VLIW processors is presented. The benefit of such an approach is highlighted by way of a case study
Keywords
digital signal processing chips; instruction sets; iterative methods; multimedia systems; parallel architectures; processor scheduling; program compilers; video coding; DSP architecture; MPEG 2 encoder/decoder; VLIW architecture; compiler-directed approach; embedded VLIW processors optimisation; high-level program restructuring; iterative approach; low-level scheduling; multimedia applications; Application software; Clocks; Computer architecture; Computer science; Digital signal processing; Hardware; Iterative methods; Oceans; Processor scheduling; VLIW;
fLanguage
English
Publisher
ieee
Conference_Titel
Digital Signal Processing Proceedings, 1997. DSP 97., 1997 13th International Conference on
Conference_Location
Santorini
Print_ISBN
0-7803-4137-6
Type
conf
DOI
10.1109/ICDSP.1997.628534
Filename
628534
Link To Document