Real-time algorithm for SIFT based on distributed shared memory architecture with homogeneous multi-core DSP

When Multi-DSP parallel architecture transfers to distributed memory way from shared memory way, its parallelism with fine-grained become weak, and it´s difficult to offer SIFT´s complex computing and satisfy the need of real-time. In the paper, a parallel algorithm, based on distributed shared memory architecture with homogeneous Multi-core DSP, referring to the DSM architecture model of parallel processing machines is presented. Firstly, the master processor separates the task into several small tasks by exploiting the coarse-grained parallelism inherent; then, through a high-speed network for data-exchange, each small task transfers to a related subsystem, based on a homogeneous multi-core DSP; finally, the DSP partitions the small task across multiple cores by exploiting the fined-grained parallelism. The experimental result shows that, comparing to the traditional way, the proposed algorithm increases the speedup, calculates 45 frames on 640×480 images, and achieves the real-time application.