DocumentCode
3136502
Title
On Selection of Optimum Signal Source Impedance for Inductively-Degenerated CMOS LNAS
Author
Belostotski, Leonid ; Haslett, James W.
Author_Institution
TRLabs., Calgary Univ., Alta.
fYear
2006
fDate
38838
Firstpage
584
Lastpage
589
Abstract
Noise figure optimization techniques for an inductively-degenerated CMOS LNA with a lossy gate inductor are presented. The techniques allow for integration of the LNA directly with a non -50 Omega antenna thus removing the need for a lossy matching circuitry. The LNA noise temperature is shown to reduce by a factor of 1 when non-standard signal source resistance is used. The LNA analyzed in this paper is targeted for the Canadian large adaptive reflector (CLAR)
Keywords
CMOS integrated circuits; inductors; low noise amplifiers; CLAR; Canadian large adaptive reflector; antenna; gate inductor; inductively-degenerated CMOS LNA; low noise amplifier; noise figure optimization technique; noise temperature; signal source resistance; CMOS technology; Circuit noise; Energy consumption; Impedance; Inductors; MOSFETs; Noise figure; Q factor; Signal design; Temperature; CMOS; Canadian Large Adaptive Reflector (CLAR); Square Kilometer Array (SKA); low noise amplifier (LNA); noise optimization;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical and Computer Engineering, 2006. CCECE '06. Canadian Conference on
Conference_Location
Ottawa, Ont.
Print_ISBN
1-4244-0038-4
Electronic_ISBN
1-4244-0038-4
Type
conf
DOI
10.1109/CCECE.2006.277668
Filename
4054669
Link To Document