• DocumentCode
    3138100
  • Title

    Automatic System Level Test a Fault Location for Large Digital Systems

  • Author

    Yamada, A. ; Wakatsuki, N. ; Fukui, T. ; Funatsu, S.

  • Author_Institution
    Nippon Electric Co., Ltd., Tokyo, Japan
  • fYear
    1978
  • fDate
    19-21 June 1978
  • Firstpage
    347
  • Lastpage
    352
  • Abstract
    A system for automatic test generation and fault location, FLT-700, is described in this paper. It can treat large digital systems with 100K blocks (logic gates) or more. This is realized by utilizing Scan-Path concept, automatic partitioning and test generation techniques and automatic fault location technique. Serviceability for large computer systems can, therefore, be improved and easy maintenance realized.
  • Keywords
    Automatic testing; Circuit faults; Circuit testing; Digital systems; Fault location; Flip-flops; Logic circuits; Logic testing; System testing; Test pattern generators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation, 1978. 15th Conference on
  • Type

    conf

  • DOI
    10.1109/DAC.1978.1585196
  • Filename
    1585196
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3138100