DocumentCode
3139412
Title
Low power testing - What can commercial DFT tools provide?
Author
Lin, Xijiang
Author_Institution
Mentor Graphics Corp., Wilsonville, OR, USA
fYear
2011
fDate
25-28 July 2011
Firstpage
1
Lastpage
6
Abstract
Minimizing power consumption during functional operation and during manufacturing test has become one of the dominant requirements for the semiconductor designs in the past decade. From commercial DFT tool point of view, this paper describes the capabilities the DFT tools can provide to achieve comprehensive testing of low power designs as well as to reduce test power consumption during test application.
Keywords
integrated circuit design; low-power electronics; manufacturing processes; power consumption; commercial DFT tools p; design-for-test; low power designs; low power testing; semiconductor designs; test application; test power consumption; Automatic test pattern generation; Clocks; Discrete Fourier transforms; Logic gates; Power demand; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Green Computing Conference and Workshops (IGCC), 2011 International
Conference_Location
Orlando, FL
Print_ISBN
978-1-4577-1222-7
Type
conf
DOI
10.1109/IGCC.2011.6008609
Filename
6008609
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