• DocumentCode
    3139643
  • Title

    A low voltage operating flash memory cell with high coupling ratio using horned floating gate with fine HSG

  • Author

    Kitamura, T. ; Kawata, M. ; Honma, I. ; Yamamoto, I. ; Nishimoto, S. ; Oyama, K.

  • Author_Institution
    ULSI Device Dev. Lab., NEC Corp., Sagamihara, Japan
  • fYear
    1998
  • fDate
    9-11 June 1998
  • Firstpage
    104
  • Lastpage
    105
  • Abstract
    We achieved a novel low voltage operating flash memory cell with high coupling ratio of 0.9 which has a horned floating gate (FG) with fine HSG. The increase in the coupling ratio can reduce programming and erasing operation voltages by a maximum 4 V. Enlargement of the FG surface area by extending in the vertical direction enables the high coupling ratio without increasing cell area. In addition, the increase in the coupling ratio is significant when cell size is shrunk. We consider the horned FG cell with HSG as the most promising candidate for the flash memory cell in 0.25 and 0.18 /spl mu/m design rules.
  • Keywords
    flash memories; integrated memory circuits; 0.18 mum; 0.25 mum; 4 V; cell size; erasing operation voltages; fine HSG; flash memory cell; high coupling ratio; horned floating gate; low voltage operating flash memory cell; programming operation voltages; vertical direction; Capacitance; Character generation; Fabrication; Flash memory; Flash memory cells; Grain size; Laboratories; Low voltage; Nonvolatile memory; Ultra large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, 1998. Digest of Technical Papers. 1998 Symposium on
  • Conference_Location
    Honolulu, HI, USA
  • Print_ISBN
    0-7803-4770-6
  • Type

    conf

  • DOI
    10.1109/VLSIT.1998.689217
  • Filename
    689217