Title :
A novel step stack NOR cell for low voltage flash
Author :
Ogura, S. ; Hori, A. ; Kato, J. ; Odanaka, S. ; Akamatsu, K. ; Yamanaka, M. ; Kojima, M. ; Kotani, H.
Author_Institution :
Halo LSI Inc., Wappingers Falls, NY, USA
Abstract :
In a stack NOR flash cell, a small vertical (step) channel has been added to the conventional horizontal channel, to reduce the operating voltages for CHE injection and FN ejection. Devices and processes have been optimized based on extensive 2D simulations, with hardware results showing a 1-1.5 V reduction in the drain voltage requirement, and more than one order of magnitude increase in injection efficiency.
Keywords :
NOR circuits; flash memories; integrated circuit modelling; integrated logic circuits; integrated memory circuits; semiconductor process modelling; 2D simulations; CHE injection; EPROM; FN ejection; drain voltage; horizontal channel; injection efficiency; low voltage flash; operating voltages; stack NOR Flash cell; step stack NOR cell; vertical step channel; Boron; Channel hot electron injection; Flash memory cells; Hardware; Large scale integration; Low voltage; Nonvolatile memory; Scalability; Ultra large scale integration; Voltage control;
Conference_Titel :
VLSI Technology, 1998. Digest of Technical Papers. 1998 Symposium on
Conference_Location :
Honolulu, HI, USA
Print_ISBN :
0-7803-4770-6
DOI :
10.1109/VLSIT.1998.689218
