Benefits of SiF/sub 3//sup +/ implanted titanium silicides in advanced CMOS fabrication

We present, for the first time, dramatic improvements in the titanium silicide quality by adding SiF/sub 3//sup +/ mixing implantation in advanced CMOS SALICIDE (Self-aligned silicide) process. We obtained 4/spl times/ reduction in contact resistance and an extremely tight distribution (/spl sigma/-0.09 /spl Omega/) for N+, P+, N-poly, and P-poly contacts. Due to the introduction of fluorine in this process, we observed that the Gm degradation after 500 s constant voltage stressing is improved by 12/spl times/ for SiF/sub 3//sup +/ implanted silicided MOSFET. The silicides with SiF/sub 3//sup +/ mixing implantation have very unique properties compared with other mixing implantation using atomic species alone. This technique will improve the circuit performance, reliability, and yield in advanced CMOS process.