Title :
Reduced voltage swing, high speed CMOS driver, receiver techniques for multiple chip set applications
Author_Institution :
VLSI Technol. Inc., San Jose, CA, USA
Abstract :
A 1.0 mu m CMOS reduced voltage swing driver and receiver capable of driving 30 pF at minimum frequency of 200 MHz, while cutting power consumption by a factor of 14 compared with standard CMOS circuits is described. The drivers do not require extra power supply and external resistors and are suitable for broadband ASIC multi-chip set design.<>
Keywords :
CMOS integrated circuits; application specific integrated circuits; driver circuits; 1.0 micron; 200 MHz; 30 pF; broadband ASIC multi-chip set; high speed CMOS driver; minimum frequency; multiple chip set applications; power consumption; receiver techniques; reduced voltage swing; CMOS technology; Circuit noise; Driver circuits; Energy consumption; Inverters; Latches; Power supplies; Resistors; Very large scale integration; Voltage;
Conference_Titel :
Euro ASIC '91
Conference_Location :
Paris, France
Print_ISBN :
0-8186-2185-0
DOI :
10.1109/EUASIC.1991.212890
