Title :
A Critical Path Delay Check System
Author :
Kamikawai, Ryotaro ; Yamada, Minoru ; Chiba, Tsuneyo ; Furumaya, Kenichi ; Tsuchiya, Yoji
Author_Institution :
Central Research Laboratory, Hitachi Ltd., Tokyo, Japan
Abstract :
A Critical Path Delay Check System for designing computers is described. It calculates the critical path delay between the start and end points. It can be used in the early stage of design when, for example, the location of the components on a plug-in card has not yet been determined. Some algorithms for predicting delays are also introduced.
Keywords :
Clocks; Delay lines; Delay systems; Flip-flops; Flowcharts; Laboratories; Libraries; Logic design; Propagation delay; Semiconductor device packaging;
Conference_Titel :
Design Automation, 1981. 18th Conference on
DOI :
10.1109/DAC.1981.1585341
