DocumentCode
3140829
Title
Advances in high speed ECL technology and interconnection techniques
Author
Ohno, Ken-ichi
Author_Institution
Fujitsu Ltd., Kawasaki, Japan
fYear
1991
fDate
27-31 May 1991
Firstpage
2
Lastpage
7
Abstract
Explores recent developments in bipolar silicon technology and the production of advanced ECL (Emitter Coupled Logic) IC devices. Refined structural techniques and device scaling have been the major contributors to improved performance. Examples are given of how these silicon techniques have been combined with high density packaging and used to implement today´s ´super computers´. The effect of reduced basic gate delays and on-chip wiring delays is contrasted with the effect of relatively long interconnection delays on the whole system performance. Further developments aimed at improving both basic gate delay and wiring delay are continuing, and even higher performance bipolar silicon devices will continue.<>
Keywords
bipolar integrated circuits; delays; emitter-coupled logic; integrated circuit technology; packaging; Si bipolar technology; basic gate delays; device scaling; high density packaging; high speed ECL technology; interconnection techniques; on-chip wiring delays; structural techniques; CMOS logic circuits; Delay effects; Integrated circuit interconnections; Large scale integration; Logic devices; Packaging; Power dissipation; Propagation delay; Silicon; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Euro ASIC '91
Conference_Location
Paris, France
Print_ISBN
0-8186-2185-0
Type
conf
DOI
10.1109/EUASIC.1991.212904
Filename
212904
Link To Document