Automatic Test Generation for Stuck-Open Faults in CMOS VLSI

Because of its relative low power dissipation, intermediate speed, and high density, CMOS (Complementary Metal Oxide Semiconductor) will emerge as one of the leading VLSI technologies. Therefore, testing CMOS VLSI circuits is very important. The conventional stuck-at fault assumptions are not sufficient for modeling some faults that are peculiar to CMOS circuitry, specifically the stuck-open faults. These faults are sequential in nature. This means that when a fault occurs in a combinational circuits, the circuit behaves as a sequential circuit. Therefore, special test pattern generation techniques are necessary to test this type of faults. In this paper, we present an algorithm which uses the conventional stuck-at list to detect some stuck-open faults. Some modifications of the conventional testing procedure are necessary. Such modifications and their associated programming effort are expected to be straight forward. For the stuck-open faults that cannot be detected by the conventional stuck-at test list, a second algorithm is described that generates the tests for such faults. The algorithm generates the test if such a test exists. If not, the fault is declared as undetectable. First, we will discuss the stuck-open fault and its peculiarity to CMOS circuitry. Second, we will describe the step-by-step algorithms used to generate a complete test list for this type of fault. Finally, a small example circuit will be used to illustrate the new test generation technique and some conclusive remarks will be given.