DocumentCode
3141447
Title
Automatic PLA Synthesis from a DDL-P Description
Author
Kang, S. ; vanCleemput, W.M.
Author_Institution
Stanford University, Stanford, CA
fYear
1981
fDate
29-1 June 1981
Firstpage
391
Lastpage
397
Abstract
This paper describes an automatic PLA synthesis (APLAS) system which automatically generates a PLA for the control function of a design from a DDL-P description of a digital system. APLAS can also minimize and partition the PLA to meet the design constraints. This is a very convenient tool for designing finite state machines. The control circuit of any digital system for which a state diagram can be drawn can be designed easily using this system.
Keywords
Automata; Automatic control; Automatic generation control; Circuits; Control system synthesis; Control systems; Digital systems; Equations; Programmable logic arrays; Registers;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1981. 18th Conference on
Type
conf
DOI
10.1109/DAC.1981.1585386
Filename
1585386
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