Challenges in integrating embedded RF within a SOC

Author

Ridgers, Tim J. ; Boucey, Claire ; Frambach, Jan-Peter ; Du Roscoat, Laure Rolland ; Gamand, Patrice

Author_Institution

NXP Semicond., Caen

fYear

2008

fDate

22-24 Jan. 2008

Firstpage

547

Lastpage

550

Abstract

The challenges of integrating an embedded RF function within a system-on-chip (SOC) are outlined. An aggressive market need, combined with stringent technical difficulties, drives the need for an improved design methodology. Architecture innovations allow optimal building of RF within advanced CMOS. Antenna coexistence and substrate co-habitation have also to be addressed especially in multi-mode platforms. Only total deployment of design for excellence (DFx) procedures enables achieving production yield and cost goals. Future technology will not only use 32 and 22 nm nodes, but probably also SIP-based RF filters and MEMs.

Keywords

CMOS logic circuits; logic design; radiofrequency integrated circuits; system-on-chip; CMOS; SoC design; antenna coexistence; embedded RF function; substrate co-habitation; system-on-chip; Buildings; Built-in self-test; CMOS technology; Computer architecture; Costs; Design methodology; Digital signal processing; Manufacturing; Radio frequency; Technological innovation; Advanced CMOS; MEMS; RF filters; SIP; SOC; design methodology embedded RF; isolation;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio and Wireless Symposium, 2008 IEEE

Conference_Location

Orlando, FL

Print_ISBN

978-1-4244-1462-8

Electronic_ISBN

978-1-4244-1463-5

Type

conf

DOI

10.1109/RWS.2008.4463550

Filename

4463550