DocumentCode :
3141712
Title :
A Hierarchical Triangle-Level Culling Technique for Tile-Based Rendering
Author :
Chih-Chieh Hsiao ; Slo-Li Chu
Author_Institution :
Dept. of Inf. & Comput. Eng., Chung Yuan Christian Univ., Chungli, Taiwan
fYear :
2012
fDate :
17-20 Dec. 2012
Firstpage :
119
Lastpage :
125
Abstract :
Current 3D graphics rendering relies on tens of thousand triangles to generate realistic images on screen. As the number of triangles increases, no specific order for their input sequence exists, thus, many triangles that do not contribute to a final image must still be rasterized and shaded. This study proposes a triangle-level hierarchical culling technique for tile-based rendering. With a novel hardware efficient technique focuses on the depth and coverage relationships among triangles, the invisible triangles can now be culled right after geometry stage. Intended advantages include: cull invisible triangles earlier, reduce storage pressure, reduce triangle and list data accesses (from external memory) during rendering. The results show the proposed mechanism culls 32.99% of triangles before rasterization. In addition, about 15% of storage requirements and external memory transfer are reduced as well.
Keywords :
computational geometry; information retrieval; realistic images; rendering (computer graphics); 3D graphics rendering; data access; geometry stage; hardware efficient technique; hierarchical triangle level culling technique; realistic image generation; screen; tile-based rendering; Bandwidth; Benchmark testing; Graphics processing units; Rendering (computer graphics); Tiles; Vectors; 3D Graphics Hardware; depth test; hierarchical culling; triangle-level culling; z-test;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel Architectures, Algorithms and Programming (PAAP), 2012 Fifth International Symposium on
Conference_Location :
Taipei
ISSN :
2168-3034
Print_ISBN :
978-1-4673-4566-8
Type :
conf
DOI :
10.1109/PAAP.2012.26
Filename :
6424746
Link To Document :
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