High performance RF characteristics of raised gate/source/drain CMOS with Co salicide

In order to obtain high performance analog MOSFETs, it is important to reduce gate resistance. Recently W/Ti, CoSi/sub 2/ and NiSi gate electrodes have been proposed to realize these requirements. Especially, the Co salicided T-shape gate electrode realizes easily a low gate resistance below 1.5 ohm/sq. with a small increase in the number of process steps. Additionally, short channel effects are improved because the junction depth from the Si substrate surface at deeper source and drain regions becomes shallower due to the raised source and drain. In this paper, we demonstrate the excellent analog characteristics of Co salicided T-shape gate RF CMOS technology making use of a raised gate/source/drain structure. Extremely high fmax value of 70 GHz was realized by 0.10 μm gate length nMOSFET with low noise and low power consumption.