Title :
A Novel Current-Mode Cmos Multiple-Valued Logic Neuron
Author :
Teng, Daniel H Y
Author_Institution :
Dept. of Electr. & Comput. Eng., Saskatchewan Univ., Saskatoon, Sask.
Abstract :
This paper proposes a new neuron model that has multiple-valued logic inputs, weights, and outputs. The new model results in improved speed due to its carry-free operations. The interconnection complexity of neural network based on this model can also be reduced significantly due to the inherent properties from the multiple-valued logic. Dependent the layers of neural networks, at least 50 percentage of reduction in the interconnection area can be achieved with 4-valued logic neurons. Circuit implementation of the model using current-mode CMOS design technique is also discussed with SPICE simulations
Keywords :
CMOS logic circuits; interconnections; logic design; multivalued logic circuits; neural chips; 4-valued logic neurons; SPICE simulations; current-mode CMOS design technique; current-mode CMOS multiple-valued logic neuron; interconnection complexity; neural networks; Algebra; Artificial neural networks; CMOS logic circuits; Circuit simulation; Integrated circuit interconnections; Neural networks; Neurons; SPICE; Semiconductor device modeling; Vectors; Multiple-valued logic (MVL); current-mode CMOS logic (CMCL); neural network;
Conference_Titel :
Electrical and Computer Engineering, 2006. CCECE '06. Canadian Conference on
Conference_Location :
Ottawa, Ont.
Print_ISBN :
1-4244-0038-4
Electronic_ISBN :
1-4244-0038-4
DOI :
10.1109/CCECE.2006.277648
