• DocumentCode
    3143271
  • Title

    A Logic Simulation Machine

  • Author

    Abramovici, M. ; Levendel, Y.H. ; Meno, P.R.

  • Author_Institution
    Bell Laboratories, Naperville, IL
  • fYear
    1982
  • fDate
    14-16 June 1982
  • Firstpage
    65
  • Lastpage
    73
  • Abstract
    Special-purpose CAD hardware is increasingly being considered as a means to meet the challenge posed to conventional (software-based) CAD tools by the growing complexity of VLSI circuits. In this paper we describe the architecture of a logic simulation machine employing distributed and parallel processing. Our architecture can accommodate different levels of modeling ranging from simple gates to complex functions, and support timing analysis. We estimate that simulation implemented by the proposed special-purpose hardware will be between 10 and 60 times faster than currently used software algorithms running on general-purpose computers. With the available technology, a throughput of 1,000,000 gate evaluations/second can be achieved.
  • Keywords
    Circuit simulation; Computational modeling; Computer simulation; Hardware; Logic; Parallel processing; Software algorithms; Throughput; Timing; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation, 1982. 19th Conference on
  • Conference_Location
    Las Vegas, NV, USA
  • ISSN
    0146-7123
  • Print_ISBN
    0-89791-020-6
  • Type

    conf

  • DOI
    10.1109/DAC.1982.1585482
  • Filename
    1585482