DocumentCode
3143444
Title
Techniques for Programmable Logic Array Folding
Author
Hachtel, G.D. ; Newton, A.R. ; Sangiovanni-Vincentelli, A.L.
Author_Institution
University of Colorado, Boulder, CO
fYear
1982
fDate
14-16 June 1982
Firstpage
147
Lastpage
155
Abstract
The optimal PLA folding problem is presented and discussed in its different forms. In particular, new algorithms for row folding in unconstrained architectures and in AND-OR-AND architectures are presented and their complexity examined. The problem of finding an optimal row folding after a column folding has been performed, is described and an algorithm for its solution given. Finally, the organization of an APL package for row and column folding of PLA´s is introduced and experimental results reported.
Keywords
Boolean functions; Circuits; Computer architecture; Laboratories; Logic arrays; Logic design; Logic functions; Packaging; Programmable logic arrays; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1982. 19th Conference on
Conference_Location
Las Vegas, NV, USA
ISSN
0146-7123
Print_ISBN
0-89791-020-6
Type
conf
DOI
10.1109/DAC.1982.1585494
Filename
1585494
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