Title :
Heuristics and Evaluations of Energy-Aware Task Mapping on Heterogeneous Multiprocessors
Author :
Sun, Wei ; Sugawara, Tomoyoshi
Author_Institution :
Syst. Platforms Res. Labs., NEC Corp., Kawasaki, Japan
Abstract :
On various heterogeneous multiprocessor platforms, it is necessary to optimize the throughput and the energy consumption. The problem of optimally mapping tasks onto a set of given heterogeneous processors for minimum overall completion time has been known, in general, to be NP-complete. The energy consumption of a task may be very different in heterogeneous processors. However, if the most energy-efficient processor for each task is always chosen in the task mapping, the completion time of a set of tasks may grow wildly in the worst case. DVS (Dynamic Voltage Scaling) technique is currently available in a larger number of processors to effectively reduce dynamic power dissipation and consequently to save a proportion of total energy consumption, but meanwhile the execution time of a task running in lower voltage definitely becomes longer. Hence, the task mapping problem in terms of time, energy and voltage turns more complicated and harder to solve along with the heterogeneity. Moreover, today most processors only support discrete DVS and thus the optimization problem tends to be Integer Linear Programming problems for which, as we know, there is no polynomial time algorithm unless P = NP. In this paper we formulate and study the optimization problem of reducing overall completion time and the total energy consumption, and then some heuristics, which are experimentally evaluated and compared.
Keywords :
computational complexity; energy consumption; integer programming; linear programming; multiprocessing systems; power aware computing; NP-complete problem; dynamic power dissipation; dynamic voltage scaling technique; energy-aware task mapping; heterogeneous multiprocessor platform; integer linear programming; polynomial time algorithm; task energy consumption; Complexity theory; Energy consumption; Heuristic algorithms; Optimization; Program processors; Schedules; Voltage control;
Conference_Titel :
Parallel and Distributed Processing Workshops and Phd Forum (IPDPSW), 2011 IEEE International Symposium on
Conference_Location :
Shanghai
Print_ISBN :
978-1-61284-425-1
Electronic_ISBN :
1530-2075
DOI :
10.1109/IPDPS.2011.209