Title :
Automated Partitioning of Hierarchically Specified Digital Systems
Author :
Payne, Thomas S. ; vanCleemput, W.M.
Author_Institution :
SILVAR-LISCO, Palo Alto, CA
Abstract :
This paper describes a heuristic algorithm for automatically partitioning digital systems. High- level information contained within a hierarchical design is used to increase the effectiveness of this algorithm. This algorithm uses a constructive process to build a physical design of a hierarchically specified logic design. An iterative improvement step is then done.
Keywords :
Algorithm design and analysis; Digital systems; Hardware; Heuristic algorithms; Integrated circuit interconnections; Iterative algorithms; Logic circuits; Logic design; Partitioning algorithms; Pins;
Conference_Titel :
Design Automation, 1982. 19th Conference on
Conference_Location :
Las Vegas, NV, USA
Print_ISBN :
0-89791-020-6
DOI :
10.1109/DAC.1982.1585499
