Title :
Hot-carrier reliability study and simulation methodology development for 65nm technology
Author :
ManjulaRani, K.N. ; Mooraka, Ram Mohan ; Patel, Nayan ; Samanta, Santanu ; Narasimhan, Geetha ; Lakshminarayanan, N. ; Kapre, Ravindra ; Puchner, Helmut
Author_Institution :
Cypress Semicond. Modeling & Technol. R&D, Bangalore, India
Abstract :
In this work, we report degradation study in 65 nm technology NMOS I/O transistors (Tox = 55 A¿) for different channel widths. Devices were stressed at maximum substrate current condition in order to stimulate HCI degradation. These measurements were validated using analytical equations and reliability models extracted to be compatible with Eldo simulation tool using User Defined Reliability Model (UDRM) approach.
Keywords :
MOSFET; semiconductor device reliability; substrates; Eldo simulation tool; HCI degradation; NMOS transistors; UDRM approach; analytical equations; channel widths; distance 55 angstrom; hot-carrier reliability study; reliability models; simulation methodology; size 65 nm; substrate current; user defined reliability model; CMOS technology; Charge pumps; Circuit simulation; Current measurement; Degradation; Equations; Hot carriers; Human computer interaction; Stress measurement; Threshold voltage;
Conference_Titel :
Integrated Reliability Workshop Final Report, 2009. IRW '09. IEEE International
Conference_Location :
S. Lake Tahoe, CA
Print_ISBN :
978-1-4244-3921-8
Electronic_ISBN :
1930-8841
DOI :
10.1109/IRWS.2009.5383015
