DocumentCode :
3143854
Title :
Analogue circuit synthesis from performance specifications
Author :
Lam, Y. ; Zwolinski, Mark
Author_Institution :
Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore
fYear :
1997
fDate :
35753
Firstpage :
42461
Lastpage :
42466
Abstract :
Global optimisation techniques such as simulated annealing have been successfully applied to the digital synthesis problem. In this paper we describe how this technique has been applied to the synthesis of analogue circuits. To date, simulated annealing has been used to select component values, but the approach is being extended to topology selection
Keywords :
analogue integrated circuits; analogue circuit synthesis; circuit CAD; global optimisation techniques; performance specifications; simulated annealing; topology selection;
fLanguage :
English
Publisher :
iet
Conference_Titel :
Mixed-Signal AHDL/VHDL Modelling and Synthesis (Ref. No: 1997/331), IEE Colloquium on
Conference_Location :
London
Type :
conf
DOI :
10.1049/ic:19971119
Filename :
660668
Link To Document :
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