Title :
PEARL and PEACH: A Novel PCI Express Direct Link and Its Implementation
Author :
Hanawa, Toshihiro ; Boku, Taisuke ; Miura, Shin Ichi ; Sato, Mitsuhisa ; Arimoto, Kazutami
Author_Institution :
Grad. Sch. of Syst. & Inf. Eng., Univ. of Tsukuba, Tsukuba, Japan
Abstract :
We have proposed PEARL, which is a power-aware, high-performance, dependable communication link using PCI Express as a direct communication device, for application in a wide range of parallel processing systems, from high-end embedded systems to small-scale high-performance clusters. The PEACH chip used to realize PEARL connects four ports of PCI Express Gen 2 with four lanes and uses an M32R processor with four cores and several DMACs. We also develop the PEACH board as a network interface card for implementing the PEACH chip. The preliminary evaluation results indicate that the PEACH board achieves a maximum performance of 1.1 Gbyte/s. In addition, through power-aware control, the power consumption can be reduced by up to 0.7 watts, and both the time required to reduce the number of lanes and the time required to change from Gen 2 to Gen 1 are 10 μs.
Keywords :
microprocessor chips; multiprocessing systems; parallel processing; peripheral interfaces; power aware computing; DMAC; M32R processor; PCI express direct link; PCI express gen 2; PEACH board; PEACH chip; PEARL; dependable communication link; direct communication device; high-end embedded systems; high-performance communication link; network interface card; parallel processing systems; power consumption; power-aware communication link; power-aware control; preliminary evaluation; small-scale high-performance clusters; Bandwidth; Fault tolerance; Fault tolerant systems; Performance evaluation; Power demand; Switches;
Conference_Titel :
Parallel and Distributed Processing Workshops and Phd Forum (IPDPSW), 2011 IEEE International Symposium on
Conference_Location :
Shanghai
Print_ISBN :
978-1-61284-425-1
Electronic_ISBN :
1530-2075
DOI :
10.1109/IPDPS.2011.232