DocumentCode
3144705
Title
Auto-Delay: A Program for Automatic Calculation of Delay in LSI/VLSI Chips
Author
Putatunda, Rathin
Author_Institution
RCA Advanced Technology Laboratories, Camden, NJ
fYear
1982
fDate
14-16 June 1982
Firstpage
616
Lastpage
621
Abstract
This paper describes a program for automatically computing the delay through LSI/VLSI chips which have been laid out using automatic layout programs. A unique algorithm for synthesizing RC networks from artwork data, which significantly reduces execution time and computer storage, is included. A novel and simple method for determining the delay through logic gates due to arbitrary RC network load at the output is also presented and discussed.
Keywords
Capacitance; Delay effects; Driver circuits; Integrated circuit interconnections; Intelligent networks; Laboratories; Large scale integration; Network synthesis; Routing; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1982. 19th Conference on
Conference_Location
Las Vegas, NV, USA
ISSN
0146-7123
Print_ISBN
0-89791-020-6
Type
conf
DOI
10.1109/DAC.1982.1585560
Filename
1585560
Link To Document