Title :
A statistical gate CD control including OPC
Author :
Misaka, A. ; Goda, A. ; Odanaka, S. ; Kobayashi, S. ; Watanabe, H.
Author_Institution :
ULSI Process Technol. Dev. Center, Matsushita Electron. Corp., Kyoto, Japan
Abstract :
In this paper, a new statistical methodology including a pattern bias optical proximity correction (OPC) is developed for controlling the gate critical dimension (CD) variation at CMOS cell level. The method reveals that correcting of the gate patterns is essential to achieve the effect of resolution enhancement technology (RET) at cell level. It is shown that the gate CD variation at cell level is significantly decreased by introducing both OPC and annular illumination with a halftone phase shift mask (PSM).
Keywords :
CMOS integrated circuits; integrated circuit technology; phase shifting masks; photolithography; proximity effect (lithography); CMOS cell; annular illumination; halftone phase shift mask; optical projection lithography; optical proximity correction; resolution enhancement technology; statistical gate CD control; Algorithm design and analysis; Arithmetic; Flowcharts; Focusing; Lighting; Lithography; Polynomials; Resists; Statistical analysis; Ultra large scale integration;
Conference_Titel :
VLSI Technology, 1998. Digest of Technical Papers. 1998 Symposium on
Conference_Location :
Honolulu, HI, USA
Print_ISBN :
0-7803-4770-6
DOI :
10.1109/VLSIT.1998.689244
