• DocumentCode
    3145045
  • Title

    VLSI implementation of a vector quantization processor

  • Author

    Israelsen, Paul

  • Author_Institution
    Dept. of Electr. Eng., Utah State Univ., Logan, UT, USA
  • fYear
    1991
  • fDate
    8-11 Apr 1991
  • Firstpage
    463
  • Abstract
    Summary form only given. This presentation contains a discussion of the needs for a hardware Vector Quantization processor and the trade-offs involved in its design and implementation. The Codebook Processor Chip (CPC16) is a VQ processor capable of finding a full-search best match on sixteen codevectors in parallel. Maximum vector size is 625 samples. Full search of larger codebooks is possible by cascading several chips in parallel. Tree search and multi-stage searches are possible by cascading multiple chips in series in a pipeline structure
  • Keywords
    VLSI; computerised picture processing; digital signal processing chips; Codebook Processor Chip; VLSI implementation; cascading; design; multi-stage searches; trade-offs; tree search; vector quantization processor; Clocks; Computational efficiency; Costs; Hardware; Image coding; Power generation; Prototypes; Search methods; Vector quantization; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Data Compression Conference, 1991. DCC '91.
  • Conference_Location
    Snowbird, UT
  • Print_ISBN
    0-8186-9202-2
  • Type

    conf

  • DOI
    10.1109/DCC.1991.213298
  • Filename
    213298