Title :
A very high speed noiseless data compression chip for space imaging applications
Author :
Anderson, Robert ; Bowers, Jeffrey ; Fang, Wai-Chi ; Johnson, Donald ; Lee, Jun-ji ; Nixon, Robert
Author_Institution :
Jet Propulsion Lab., Pasadena, CA, USA
Abstract :
Summary form only given. The same logic design was implemented with a CMOS process in two ASIC technologies, gate array and standard cell. The noiseless compression algorithm and chip implementations were specific to the requirements of the Earth Observing System High-Resolution Imaging Spectrometer (HIRIS) instrument
Keywords :
CMOS integrated circuits; VLSI; application specific integrated circuits; cellular arrays; computerised picture processing; data compression; digital signal processing chips; integrated circuit testing; logic design; ASIC; CMOS process; Earth Observing System; High-Resolution Imaging Spectrometer; VHSIC; algorithm; gate array; logic design; noiseless data compression chip; space imaging; standard cell; Application specific integrated circuits; CMOS process; CMOS technology; Compression algorithms; Data compression; Earth Observing System; High-resolution imaging; Logic arrays; Logic design; Space technology;
Conference_Titel :
Data Compression Conference, 1991. DCC '91.
Conference_Location :
Snowbird, UT
Print_ISBN :
0-8186-9202-2
DOI :
10.1109/DCC.1991.213299
