DocumentCode
3145078
Title
A very high speed lossless compression/decompression chip set
Author
Venbrux, Jack ; Liu, Norley
Author_Institution
NASA Space Eng. Res. Center for VLSI Syst. Design, Idaho Univ., Moscow, ID, USA
fYear
1991
fDate
8-11 Apr 1991
Firstpage
461
Abstract
Summary form only given. The chip set is designed to be able to compress and decompress different types of data. It will handle quantization from 4 through 14 bits per pixel and supports nearest neighbor prediction or using an externally supplied predictor. The DPCM part of the compressor and decompressor can be totally bypassed. The algorithm put into silicon is the Rice Algorithm. The chip set performs close to the theoretical entropy in the range from approximately 1.5 to 12.5 bits/pixel
Keywords
VLSI; data compression; digital signal processing chips; entropy; pulse-code modulation; DPCM; Rice Algorithm; VHSIC; entropy; lossless compression/decompression chip set; nearest neighbor prediction; quantization; Decoding; Design engineering; Entropy; Image coding; Lifting equipment; Military satellites; NASA; Quantization; Silicon; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Data Compression Conference, 1991. DCC '91.
Conference_Location
Snowbird, UT
Print_ISBN
0-8186-9202-2
Type
conf
DOI
10.1109/DCC.1991.213300
Filename
213300
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