DocumentCode :
314517
Title :
Circuit clustering and its effects on a multi-way circuit partitioning heuristic
Author :
Kennings, Andrew ; Frazer, Mark
Author_Institution :
Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada
Volume :
1
fYear :
1997
fDate :
25-28 May 1997
Firstpage :
15
Abstract :
We propose a clustering heuristic based on circuit connectivity which produces a large number of small clusters of nearly equal size. We investigate a two phase partitioning heuristic. Cell interchanges are applied to a clustered circuit and subsequently to the original circuit. Numerical results demonstrate our two phase heuristic produces better partitions with less computational effort than its one phase counterpart
Keywords :
circuit layout CAD; heuristic programming; logic CAD; logic partitioning; circuit clustering; circuit connectivity; clustering heuristic; multi-way circuit partitioning; two phase heuristic; two phase partitioning; Integrated circuit interconnections; Pins; Polynomials; Scholarships; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical and Computer Engineering, 1997. Engineering Innovation: Voyage of Discovery. IEEE 1997 Canadian Conference on
Conference_Location :
St. Johns, Nfld.
ISSN :
0840-7789
Print_ISBN :
0-7803-3716-6
Type :
conf
DOI :
10.1109/CCECE.1997.614778
Filename :
614778
Link To Document :
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