DocumentCode
3145218
Title
Automated Layout in ASHLAR: An Approach to the Problems of "General Cell" Layout for VLSI
Author
Hassett, James E.
Author_Institution
Sperry Univac, Eagan, MN
fYear
1982
fDate
14-16 June 1982
Firstpage
777
Lastpage
784
Abstract
The automated layout facilities of the ASHLAR program, currently under development at the Defense Systems Division of Sperry Univac, are described. ASHLAR is an interactive layout system to be used in developing hierarchical VLSI designs with cells having arbitrary dimensions. Treatment of the problems of placement, power bus routing, and polysilicon interconnect usage are given particular attention. Finally, some results of a prototype implementation are presented.
Keywords
Design automation; Integrated circuit layout; Power system interconnection; Prototypes; Routing; Shape; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1982. 19th Conference on
Conference_Location
Las Vegas, NV, USA
ISSN
0146-7123
Print_ISBN
0-89791-020-6
Type
conf
DOI
10.1109/DAC.1982.1585584
Filename
1585584
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