• DocumentCode
    3145432
  • Title

    A Design Methodology based upon Symbolic Layout and Integrated CAD Tools

  • Author

    Beyls, A.M. ; Hennion, B. ; Lecourvoisier, J. ; Mazare, G. ; Puissochet, A.

  • Author_Institution
    Centre National d´´Etudes des Telecommunications, CNS, MEYLAN, FRANCE
  • fYear
    1982
  • fDate
    14-16 June 1982
  • Firstpage
    872
  • Lastpage
    878
  • Abstract
    This paper describes one of the new methodologies for IC design currently being used at the CNET. The main features detailed are the symbolic layout method called MDMOS and the integrated CAD system CASSIOPEE. Its most significant advantages are design safety, elimination of costly and inefficient checks and supply of technical specifications which are always up-to-date. This methodology is described in its entirety starting from the logical description, and including all stages up to masks generation.
  • Keywords
    Circuit simulation; Circuit testing; Command languages; Design automation; Design methodology; Layout; Logic testing; Process design; Safety; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation, 1982. 19th Conference on
  • Conference_Location
    Las Vegas, NV, USA
  • ISSN
    0146-7123
  • Print_ISBN
    0-89791-020-6
  • Type

    conf

  • DOI
    10.1109/DAC.1982.1585596
  • Filename
    1585596