Abstract :
The paper presents a digital logic modeling system based on MODLAN language. MODLAN, the Hardware Description Language (HDL), is especially useful for hierarchical modeling of microprocessor systems. The modeling system supports both natural design philosophies, i.e., top-down and bottom-up. At each design stage a user is provided with MODLAN language constructs, enabling notation of his design concept and its verification through simulation. Algorithmic level, instruction level, and chip level of modeling may be distinguished during a design of microprocessor systems. The modeling environment presents its applicability during the whole design process. The functional description of a microprocessor system has been dealt with more deeply. Both aspects of functional definition methodology, i.e., module´s logic/algorithm notation and module´s timing relations are discussed. Special emphasis is placed on presentation of dynamics in a digital element model. Four-parameter delay model and special timing tests for input signal timing dependencies verification are imbedded in a functional module´s definition. Finally, the user´s requirements for hierarchical modeling of the microprocessor system have been stated. A brief presentation of the MODLAN language is illustrated with examples of microcomputer elements descriptions.
