DocumentCode :
3145974
Title :
A New Integrated System for PLA Testing and Verification
Author :
Somenzi, Fable ; Gai, Silvano ; Mezzalama, M. ; Prinetto, Paolo
Author_Institution :
SGS ATES Componenti Elettronici Central R & D, Agrate Brianza, Italy
fYear :
1983
fDate :
27-29 June 1983
Firstpage :
57
Lastpage :
63
Abstract :
PART is a system for PLA testing and verification, intended to be properly interfaced with other existing tools to generate a comprehensive design environment. To this purpose, it provides several facilities, among which the capability of generating fault population on the basis of layout information. PART aims at producing a very compact test set for all detectable crosspoint defects, using limited amounts of run time and storage. This is achieved by means of an efficient partitioning algorithm together with powerful heuristics. Test minimality is ensured by a simple procedure. In the present paper these are discussed, experimental results are given and a comparison with competing strategies is made.
Keywords :
Automatic testing; Contracts; Decoding; Design automation; Partitioning algorithms; Programmable logic arrays; Silicon; System testing; Test pattern generators; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1983. 20th Conference on
ISSN :
0738-100X
Print_ISBN :
0-8186-0026-8
Type :
conf
DOI :
10.1109/DAC.1983.1585626
Filename :
1585626
Link To Document :
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