AQUARIUS: Logic Simulation on an Engineering Workstation

Aquarius is an interactive hierarchical logic simulator designed to run in a multiple window (concurrent processing) environment on an Engineering Workstation. This approach lets an engineer iterate conveniently between simulation and modification of the logic model or input patterns. Because Aquarius is hierarchical, any subtree of the model may be simulated, facilitating bottom-up design verification. Aquarius uses an event-driven selective trace algorithm and 9 logic states. It models the bidirectional nature of NMOS and CMOS pass elements with a variation of the Sherwood algorithm, which uses pairs of unidirectional gates and inserts phantom zero-delay elements at junction points. This modified algorithm precludes the possibility of erroneous feedback that can result from application of the Sherwood approach for certain network topologies. The Aquarius interactive user interface is menu driven; its progressive disclosure approach uses a form fill-in paradigm and postfix syntax that is keystroke efficient and natural for engineers.