DocumentCode :
3146109
Title :
Modeling communication with Objective VHDL
Author :
Putzke-Röming, Wolfram ; Radetzki, Martin ; Nebel, Wolfgang
Author_Institution :
OFFIS Res. Inst., Oldenburg, Germany
fYear :
1998
fDate :
16-19 Mar 1998
Firstpage :
83
Lastpage :
89
Abstract :
Objective VHDL was developed to utilize the object-oriented paradigm to the hardware design process. In order to facilitate flexible modeling of communication among (entity) objects appropriate to the specific context, no message passing mechanism has been integrated into the language. Based on earlier ideas related to message passing with Objective VHDL the paper demonstrates the design and implementation of a complete communication mechanism. As an example a non blocking handshake protocol is chosen. Special emphasis has been given to an abstract user-interface and good reusability of the communication mechanism
Keywords :
hardware description languages; logic CAD; message passing; object-oriented languages; object-oriented programming; transport protocols; Objective VHDL; abstract user-interface; communication mechanism; flexible modeling; hardware design process; message passing mechanism; nonblocking handshake protocol; object-oriented paradigm; Containers; Context modeling; Contracts; Electronic design automation and methodology; Hardware; Message passing; Object oriented modeling; Process design; Protocols; Terminology;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Verilog HDL Conference and VHDL International Users Forum, 1998. IVC/VIUF. Proceedings., 1998 International
Conference_Location :
Santa Clara, CA
ISSN :
1085-9403
Print_ISBN :
0-8186-8415-1
Type :
conf
DOI :
10.1109/IVC.1998.660685
Filename :
660685
Link To Document :
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