Low power semi-static TSPC D-FFs using split-output latch

D-FFs play an important role in CMOS digital circuits, because the delay, area and power consumption of D-FFs significantly affect the performance of VLSI chips. We propose two types of semi-static TSPC D-FFs using split-output latch which improve the HSTSPC D-FF. One is a double split-output semi-static TSPC D-FF (DSSTSPC D-FF), which is a speed-efficient design, and the other is a single split-output semi-static TSPC D-FF (SSSTSPC D-FF), which is a power and area-efficient design. The former achieves 4% less the delay than the HSTSPC D-FF. The latter achieves 31% smaller area and 30% lower power consumption than the conventional D-FF.