DocumentCode
3146407
Title
Automated architecture exploration for low energy reconfigurable AGU
Author
Taniguchi, Ittetsu ; Jayapala, Murali ; Raghavan, Praveen ; Catthoor, Francky ; Sakanushi, Keishi ; Takeuchi, Yoshinori ; Imai, Masaharu
Author_Institution
Coll. of Sci. & Eng., Ritsumeikan Univ., Kusatsu, Japan
fYear
2011
fDate
17-18 Nov. 2011
Firstpage
191
Lastpage
194
Abstract
In this paper, we introduce automated architecture exploration challenge of reconfigurable AGU (Address Generation Unit) based on coarse grained reconfigurable architecture for effective address calculation. To use reconfigurable AGU effectively, it is important to specify its architecture from many architecture candidates. Introduced architecture exploration method enables to explore the vast solution space effectively, and we can obtain the optimal trade-off points about 164 times faster than the exhaustive search.
Keywords
logic design; low-power electronics; reconfigurable architectures; AGU; address generation unit; automated architecture exploration; coarse grained reconfigurable architecture; low energy reconfigurable;
fLanguage
English
Publisher
ieee
Conference_Titel
SoC Design Conference (ISOCC), 2011 International
Conference_Location
Jeju
Print_ISBN
978-1-4577-0709-4
Electronic_ISBN
978-1-4577-0710-0
Type
conf
DOI
10.1109/ISOCC.2011.6138680
Filename
6138680
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