DocumentCode :
3146512
Title :
A vector coprocessor architecture for embedded systems
Author :
Ge, Yi ; Takebe, Yoshimasa ; Toichi, Masahiko ; Mouri, Makoto ; Ito, Makiko ; Hirose, Yoshio ; Takahashi, Hiromasa
Author_Institution :
Fujitsu Labs. Ltd., Kawasaki, Japan
fYear :
2011
fDate :
17-18 Nov. 2011
Firstpage :
195
Lastpage :
198
Abstract :
We developed a DSP for wireless base-band processing on handheld devices. The DSP is composed of a scalar CPU and a vector unit. The architecture of the vector unit inherits that of vector processors for super computers, and we customized it for embedded systems. We evaluated the processor using several programs. The evaluation showed that our DSP performs 40 times faster than scalar CPU. The peak performance is 12GOPS@250MHz.
Keywords :
coprocessors; digital signal processing chips; embedded systems; mainframes; parallel architectures; parallel machines; parallel programming; performance evaluation; vector processor systems; DSP; embedded systems; frequency 250 MHz; handheld devices; supercomputers; vector coprocessor architecture; vector processors; wireless base-band processing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SoC Design Conference (ISOCC), 2011 International
Conference_Location :
Jeju
Print_ISBN :
978-1-4577-0709-4
Electronic_ISBN :
978-1-4577-0710-0
Type :
conf
DOI :
10.1109/ISOCC.2011.6138743
Filename :
6138743
Link To Document :
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