DocumentCode :
3146743
Title :
A 34 dBm IP0.1dB SOI SP3T switch with an integrated negative-bias switch controller at 2.4 GHz
Author :
Yoon, Sunwoo ; Jung, JuYoung ; Baek, Dong-hyun
Author_Institution :
Chung-Ang Univ., Seoul, South Korea
fYear :
2011
fDate :
17-18 Nov. 2011
Firstpage :
235
Lastpage :
237
Abstract :
In this paper, a single pole triple through (SP3T) T/R switch with high input P0.1dB performance and low insertion loss is reported. The switch is designed using a 0.32 μm SOI process for 2.4 GHz operating frequencies. To increase the power capability, 10-stacked MOSFETs are used for the switching device. And the body floating techniques are also employed. The negative biasing controller for enhancing P1dB is proposed to control the switching power cell on a single die with the switch power cell. The implemented T/R switch exhibits P0.1dB of 34 dBm at 2.4 GHz from 3 V supply voltage. The insertion losses of the switch are 0.5 dB at 2.4 GHz. The isolations are more than 25 dB at 2.4 GHz.
Keywords :
UHF field effect transistors; field effect transistor switches; silicon-on-insulator; MOSFET; SOI SP3T switch design; body floating techniques; frequency 2.4 GHz; insertion loss; integrated negative-bias switch controller; single pole triple through T/R switch; size 0.32 mum; switching power cell control; voltage 3 V; SP3T; Switchs controller; T/R Switch;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SoC Design Conference (ISOCC), 2011 International
Conference_Location :
Jeju
Print_ISBN :
978-1-4577-0709-4
Electronic_ISBN :
978-1-4577-0710-0
Type :
conf
DOI :
10.1109/ISOCC.2011.6138753
Filename :
6138753
Link To Document :
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