DocumentCode
3146788
Title
An Improved Switch-Level Simulator for MOS Circuits
Author
Ramachandran, Vivek
Author_Institution
Department of Electrical Engineering and Computer Science, Princeton University, Princeton, NJ
fYear
1983
fDate
27-29 June 1983
Firstpage
293
Lastpage
299
Abstract
The notion of a well-designed circuit is introduced, and improvements are presented to the earlier switch-level simulators of Bryant [B80] and Lipton, Sedgewick, and Valdes [LSV81], so that race conditions can be detected, and undefined values can be handled in a clean and simple way in these circuits.
Keywords
Design Verification; MOS Circuits; Race Detection; Switch-Level Simulation; Circuit simulation; Circuit testing; Computational modeling; Computer simulation; Logic gates; Switches; Switching circuits; Transistors; Very large scale integration; Voltage; Design Verification; MOS Circuits; Race Detection; Switch-Level Simulation;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1983. 20th Conference on
ISSN
0738-100X
Print_ISBN
0-8186-0026-8
Type
conf
DOI
10.1109/DAC.1983.1585665
Filename
1585665
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