Design of AdaBoost classifier circuit using Haar-like features for automobile applications

This paper describes the design of AdaBoost classifier circuit using the Haar-like features for the automobile applications. In order to extract the features of an object, the proposed circuit uses the Haar-like feature extraction method. The proposed circuit extracts a total of 200 Haar-like features per sliding window. The extracted features are provided to the AdaBoost classifier circuit in order to determine whether the object is the expected one or not. A 48×96 or 64×64 sliding window with 10 window strides is used in the proposed circuit for the efficient pattern recognition. In order to increase the processing speed, the proposed circuit adopts the parallel architecture and it can process two sliding windows at the same time. We described the proposed high-performance pattern recognition circuit using Verilog HDL and synthesized the gate-level circuit using the 130nm standard cell library. The synthesized circuit consists of 428,397 gates and its maximum operating frequency is 203MHz. 148 240×8-bit, 107 192×10-bit, and one 200×102-bit SRAMs are used in the proposed circuit. The circuit processes 38.4 640×480 image frames per second, assuming ten different levels of resolution for each frame, i. e. nine successive scaling down for each 640×480 image frame.