DocumentCode
3147112
Title
Statistical modeling of capacitor mismatch effects for successive approximation register ADCs
Author
Lee, Youngjoo ; Song, Jinook ; Park, In-Cheol
Author_Institution
Dept. of Electr. Eng., KAIST, Daejeon, South Korea
fYear
2011
fDate
17-18 Nov. 2011
Firstpage
302
Lastpage
305
Abstract
This paper presents an efficient modeling method for the effects of capacitor mismatches in SAR ADCs. As the capacitor mismatch can severely degrade accuracy, it is necessary to determine the limitation of the resolution. We statistically analyze the resolution of the SAR ADCs considering both the traditional approach and the proposed advanced analysis, and the concrete relations between the capacitor mismatch ratio and the maximum achievable resolution are carefully derived. In contrast to the numerical approaches performed in the previous literatures, this analysis results in a simple closed-form expression for the relations. Since the unit-capacitor size can be optimally determined according to the proposed relations, the area and energy consumption of the capacitive DAC in SAR ADCs can be minimized. Massive Monte-Carlo simulations are conducted to verify the proposed relations, and the simulation results support the proposed analysis.
Keywords
Monte Carlo methods; analogue-digital conversion; statistical analysis; Monte-Carlo simulation; SAR ADC; capacitive DAC; capacitor mismatch effects; capacitor mismatch ratio; closed-form expression; energy consumption; statistical modeling; successive approximation register ADC; unit-capacitor size; Capacitor mismatch; Maximum resolution; Statistical analysis; Successive approximation register ADC;
fLanguage
English
Publisher
ieee
Conference_Titel
SoC Design Conference (ISOCC), 2011 International
Conference_Location
Jeju
Print_ISBN
978-1-4577-0709-4
Electronic_ISBN
978-1-4577-0710-0
Type
conf
DOI
10.1109/ISOCC.2011.6138770
Filename
6138770
Link To Document