DocumentCode
3147323
Title
Model checking a fault-tolerant startup algorithm: from design exploration to exhaustive fault simulation
Author
Steiner, Wilfried ; Rushby, John ; Sorea, Maria ; Pfeifer, Holger
Author_Institution
Real-Time Syst. Group, Technische Univ. Wien, Austria
fYear
2004
fDate
28 June-1 July 2004
Firstpage
189
Lastpage
198
Abstract
The increasing performance of modern model-checking tools offers high potential for the computer-aided design of fault-tolerant algorithms. Instead of relying on human imagination to generate taxing failure scenarios to probe a fault-tolerant algorithm during development, we define the fault behavior of a faulty process at its interfaces to the remaining system and use model checking to automatically examine all possible failure scenarios. We call this approach "exhaustive fault simulation". In this paper we illustrate exhaustive fault simulation using a new startup algorithm for the time-triggered architecture (TTA) and show that this approach is fast enough to be deployed in the design loop. We use the SAL toolset from SRI for our experiments and describe an approach to modeling and analyzing fault-tolerant algorithms that exploits the capabilities of tools such as this.
Keywords
computer aided software engineering; distributed algorithms; fault simulation; formal verification; software fault tolerance; SAL toolset; computer-aided design; design exploration; exhaustive fault simulation; fault-tolerant algorithms; fault-tolerant startup algorithm; model checking; time-triggered architecture; Algorithm design and analysis; Circuit faults; Computational modeling; Computer science; Computer simulation; Explosions; Fault tolerance; Fault tolerant systems; Humans; Real time systems;
fLanguage
English
Publisher
ieee
Conference_Titel
Dependable Systems and Networks, 2004 International Conference on
Print_ISBN
0-7695-2052-9
Type
conf
DOI
10.1109/DSN.2004.1311889
Filename
1311889
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